ACOTES
From EuroVR Knowledge Base
- Full name
- Advanced Compiler Technologies for Embedded Streaming
- Acronym
- ACOTES
- Website
- http://www.hitech-projects.com/euprojects/ACOTES/
- Keywords
- Budget
- € 5.02 million euro
- Start date
- 2006/06/01
- End date
- 2009/05/31
Contents |
Partners
- STMICROELECTRONICS N.V., AMSTERDAM, THE NETHERLANDS, SUCCURSALE DE PLAN-LES-OUATES, SWITZERLAND
- IBM ISRAEL - SCIENCE AND TECHNOLOGY LTD, ISRAEL
- UNIVERSITAT POLITECNICA DE CATALUNYA, SPAIN
- INSTITUT NATIONAL DE RECHERCHE EN INFORMATIQUE ET EN AUTOMATIQUE, FRANCE
Funding Bodies
- EU FP 6
- Action Line: IST-2005-2.5.3 Embedded systems
- STREP
Contact
- MUNK, HARM
- Tel: +31-40-2744334
- PHILIPS ELECTRONICS NEDERLAND B.V., BOSCHDIJK 525 POSTBUS 90050, 5621 JG EINDHOVEN, NETHERLANDS
Objectives
The goal of the ACOTES project is to address the complexity and cost of programming the forthcoming embedded architectures by implementing program transformation techniques in compilation tools which will enable efficient programming of low-cost, highly parallel architectures for stream-processing. Digital circuits embedded inside video- and audio-centric consumer electronics devices (digital television sets, DVD recorders, mobile phones, etc.) process large streams of data and are subject to constraints not found in the general-purpose computing context, such as limited power consumption and stringent real-time requirements. To keep costs low, the designs of such devices traditionally relied on dedicated circuits because of silicon efficiency, resulting in high compute density and low power dissipation in small packages.
Recently, the fast change in application requirements and increasing circuit development costs has moved the balance towards the use of programmable components, dramatically increasing the software content in products. However, the simultaneous increase in performance requirements precludes the use of general-purpose processors, especially in the area of advanced video processing. As a consequence, the combination of performance, flexibility, power, and cost constraints creates a major gap between the current programmable processors and the actual requirements. Under the above constraints, the required performance levels can only be met by parallel architectures consisting of multiple, programmable blocks specifically designed for efficient processing of data streams.
Application areas include image improvement for TV sets, multimedia processing, image and signal processing for medical systems, virtual reality workbenches, advanced radio communication systems, and novel applications such as 2D to 3D conversion. The 3-year project involves research departments of four major companies in the field, one research institute and one university.
